/* MEMORY LOCATIONS AND IMMEDIATES ARE 16 BITS LONG */ enum OPS_STARTING_VALUES { MOVI, MOVR, LOAD, STOR, ADDI, ADDR, SUBI, SUBR, XORB, XORW, XORR, NOTR, MULI, MULR, DIVI, DIVR, PUSH, POOP, CMPI, CMPR, JUMP, JMPA, JMPB, JMPE, SHIT, NOPE, GRMN, NUM_OPS }; uint8_t OPS[NUM_OPS]; /* INSTRUCTION SIZE TYPES */ #define REG2REG 2 #define IMM2REG 4 #define REG2IMM 4 #define BYT2REG 3 #define UNARY 2 #define SINGLE 1 /* INSTRUCTION SIZES */ #define MOVI_SIZE IMM2REG #define MOVR_SIZE REG2REG #define LOAD_SIZE IMM2REG #define STOR_SIZE REG2IMM #define ADDI_SIZE IMM2REG #define ADDR_SIZE REG2REG #define SUBI_SIZE IMM2REG #define SUBR_SIZE REG2REG #define XORB_SIZE BYT2REG #define XORW_SIZE IMM2REG #define XORR_SIZE REG2REG #define NOTR_SIZE UNARY #define MULI_SIZE IMM2REG #define MULR_SIZE REG2REG #define DIVI_SIZE IMM2REG #define DIVR_SIZE REG2REG #define PUSH_SIZE UNARY #define POOP_SIZE UNARY #define CMPI_SIZE IMM2REG #define CMPR_SIZE REG2REG #define JUMP_SIZE UNARY #define JMPA_SIZE UNARY #define JMPB_SIZE UNARY #define JMPE_SIZE UNARY #define SHIT_SIZE SINGLE #define NOPE_SIZE SINGLE #define GRMN_SIZE SINGLE