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No commits in common. "6f9e7db4ee617e47948232658f9fd49e03ea31a6" and "e5180294855b5e36d4dc09ef52b0a7ef3af6dfe4" have entirely different histories.
6f9e7db4ee
...
e518029485
@ -102,6 +102,7 @@ class VMAssembler:
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symcall = symcall_re.match(str(i))
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symcall = symcall_re.match(str(i))
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if symcall:
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if symcall:
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symname = symcall.group(1)
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symname = symcall.group(1)
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# checking if it's a jump to a label
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# checking if it's a jump to a label
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if symname in [y.label for x in self.functions for y in x.instructions]:
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if symname in [y.label for x in self.functions for y in x.instructions]:
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fun = next(
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fun = next(
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@ -125,7 +126,7 @@ class VMAssembler:
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for f in self.functions:
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for f in self.functions:
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print("FUNCTION {}".format(f.name))
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print("FUNCTION {}".format(f.name))
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for idx, ins in enumerate(f.instructions):
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for idx, ins in enumerate(f.instructions):
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print("{}:\t{}".format(hex(f.offset+ f.offset_of_instruction(idx)), ins))
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print("{}:\t{}".format(hex(f.offset_of_instruction(idx)), ins))
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def imm2reg(self, instruction):
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def imm2reg(self, instruction):
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"""
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"""
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@ -234,6 +235,7 @@ class VMAssembler:
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reg_op_re = re.compile(".*[rR]$")
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reg_op_re = re.compile(".*[rR]$")
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symcall = symcall_re.match(str(instruction))
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symcall = symcall_re.match(str(instruction))
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dst = instruction.args[0]
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dst = instruction.args[0]
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print(instruction)
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# define the kind of jump: to immediate or to register
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# define the kind of jump: to immediate or to register
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if imm_op_re.match(instruction.opcode.name):
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if imm_op_re.match(instruction.opcode.name):
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self.immonly(instruction)
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self.immonly(instruction)
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@ -345,6 +347,7 @@ class VMInstruction:
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raise InvalidOperation(opcode)
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raise InvalidOperation(opcode)
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self.size = ops_sizes[self.opcode.method]
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self.size = ops_sizes[self.opcode.method]
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args = [x for x in ins.groups()[1:] if x is not None]
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args = [x for x in ins.groups()[1:] if x is not None]
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print("OP: {} | ARGS: {} | SYMCALL: {}".format(self.opcode, args,symcall))
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for a in args:
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for a in args:
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if immediate_re.match(a) or symcall:
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if immediate_re.match(a) or symcall:
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# directly append the immediate
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# directly append the immediate
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@ -475,20 +478,20 @@ ops_sizes = {"reg2reg": 2,
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"imm2reg": 4,
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"imm2reg": 4,
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"reg2imm": 4,
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"reg2imm": 4,
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"byt2reg": 3,
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"byt2reg": 3,
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"regonly": 2,
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"regonly": 3,
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"immonly": 3,
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"immonly": 3,
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"jump": 3,
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"jump": 3,
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"single": 1}
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"single": 1}
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ops = [VMComponent(le[0], i, le[1]) for i, le in enumerate(op_names)]
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ops = [VMComponent(le[0], i, le[1]) for i, le in enumerate(op_names)]
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regs = [VMComponent(s.casefold(), i) for i, s in enumerate(reg_names)]
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regs = [VMComponent(s.casefold(), i) for i, s in enumerate(reg_names)]
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instruction_re = re.compile(
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instruction_re = re.compile(
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"^([\w]{4})(?:(?:\ *\#.*)|(?:\ +(?:([\w]+)\ *(?:,[\ ]*([\w]+))?)(?:\ *\#.*)?))?$") # 1: opcode 2+: args
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"^([\w]{4})(?:\ +(?:([\w]+)\ *(?:,[\ ]*([\w]+))*))?$") # 1: opcode 2+: args
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function_re = re.compile("(?:def\ )([a-zA-Z]*)\:(?:\ *\#.*)?$")
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function_re = re.compile("(?:def\ )([a-zA-Z]*)\:")
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immediate_re = re.compile("(?:0x)?[0-9a-fA-F]+$")
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immediate_re = re.compile("(?:0x)?[0-9a-fA-F]+$")
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alpha_re = re.compile("^[a-zA-Z]*$")
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alpha_re = re.compile("^[a-zA-Z]*$")
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register_re = re.compile("(^[rRsS][0-4]$)|([iIrRsS][pP]$)")
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register_re = re.compile("(^[rRsS][0-4]$)|([iIrRsS][pP]$)")
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label_re = re.compile("^([a-zA-Z]+)\:(?:\ *\#.*)?$")
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label_re = re.compile("^([a-zA-Z]+)\:$")
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symcall_re = re.compile("^(?:[jJ][pPmM][pPaAbBeEnN][iIrR]|(?:[cC][aA][lL]{2}))\ +([\w]+)(?:\ *\#.*)?$")
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symcall_re = re.compile("^(?:[jJ][pPmM][pPaAbBeEnN][iIrR]|(?:[cC][aA][lL]{2}))\ +([\w]*)$")
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def main():
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def main():
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@ -4,18 +4,16 @@
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#include <string.h>
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#include <string.h>
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#include <unistd.h>
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#include <unistd.h>
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void encrypt(uint16_t *v) {
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void encrypt(uint16_t *v, uint16_t *k) {
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uint16_t v0 = v[0], v1 = v[1], sum = 0, i; /* set up */
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uint16_t v0 = v[0], v1 = v[1], sum = 0, i; /* set up */
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uint16_t delta= 0x626f;
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//uint32_t delta = 0x9e3779b9; /* a key schedule constant */
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uint16_t k0 = 0x7065; // "pe"
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uint16_t delta= 0x9e37;
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uint16_t k1 = 0x7065; // "pe"
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uint16_t k0 = k[0], k1 = k[1], k2 = k[2], k3 = k[3]; /* cache key */
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uint16_t k2 = 0x7275; // "ru"
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for (i = 0; i < 64; i++) { /* basic cycle start */
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uint16_t k3 = 0x6e73; // "ns"
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for (i = 0; i < 128; i++) {
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sum += delta;
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sum += delta;
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v0 += ((v1 << 4) + k0) ^ (v1 + sum) ^ ((v1 >> 5) + k1);
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v0 += ((v1 << 4) + k0) ^ (v1 + sum) ^ ((v1 >> 5) + k1);
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v1 += ((v0 << 4) + k2) ^ (v0 + sum) ^ ((v0 >> 5) + k3);
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v1 += ((v0 << 4) + k2) ^ (v0 + sum) ^ ((v0 >> 5) + k3);
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}
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} /* end cycle */
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v[0] = v0;
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v[0] = v0;
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v[1] = v1;
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v[1] = v1;
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}
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}
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@ -24,14 +22,14 @@ int main(int argc, char *argv[]) {
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uint8_t *buf;
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uint8_t *buf;
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uint32_t buflen, i;
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uint32_t buflen, i;
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if (argc != 2) {
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if (argc != 3) {
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printf("Usage: %s text_to_encrypt", argv[0]);
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printf("Usage: %s text_to_encrypt key", argv[0]);
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exit(1);
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exit(1);
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}
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}
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buflen = strlen(argv[1]);
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buflen = strlen(argv[1]);
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buf = (uint8_t *)malloc(buflen);
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buf = (uint8_t *)malloc(buflen);
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memcpy(buf, argv[1], buflen);
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memcpy(buf, argv[1], buflen);
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encrypt((uint16_t *)buf);
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encrypt((uint16_t *)buf, (uint16_t *)argv[2]);
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printf("Result:\n");
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printf("Result:\n");
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for (i = 0; i < buflen; i++) {
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for (i = 0; i < buflen; i++) {
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printf("%02x", buf[i]);
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printf("%02x", buf[i]);
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20
vm/vm.cpp
20
vm/vm.cpp
@ -577,9 +577,9 @@ bool VM::execCMPB(void) {
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flags.ZF = 0;
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flags.ZF = 0;
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}
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}
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if (*((uint8_t *)®s[reg]) > imm) {
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if (*((uint8_t *)®s[reg]) > imm) {
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flags.CF = 0;
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} else {
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flags.CF = 1;
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flags.CF = 1;
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} else {
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flags.CF = 0;
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}
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}
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return true;
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return true;
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}
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}
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@ -599,9 +599,9 @@ bool VM::execCMPW(void) {
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flags.ZF = 0;
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flags.ZF = 0;
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}
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}
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if (regs[reg] > imm) {
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if (regs[reg] > imm) {
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flags.CF = 0;
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} else {
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flags.CF = 1;
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flags.CF = 1;
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} else {
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flags.CF = 0;
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}
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}
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return true;
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return true;
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}
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}
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@ -621,9 +621,9 @@ bool VM::execCMPR(void) {
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flags.ZF = 0;
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flags.ZF = 0;
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}
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}
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if (regs[r1] > regs[r2]) {
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if (regs[r1] > regs[r2]) {
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flags.CF = 0;
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} else {
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flags.CF = 1;
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flags.CF = 1;
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} else {
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flags.CF = 0;
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}
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}
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return true;
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return true;
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}
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}
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@ -657,7 +657,7 @@ bool VM::execJPAI(void) {
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imm = *(uint16_t *)&as.code[regs[IP] + 1];
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imm = *(uint16_t *)&as.code[regs[IP] + 1];
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DBG_INFO(("JPAI 0x%x\n", imm));
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DBG_INFO(("JPAI 0x%x\n", imm));
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if (flags.CF == 0 && flags.ZF == 0) {
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if (flags.CF == 1) {
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regs[IP] = imm;
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regs[IP] = imm;
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return true;
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return true;
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}
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}
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@ -671,7 +671,7 @@ bool VM::execJPAR(void) {
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reg = as.code[regs[IP] + 1];
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reg = as.code[regs[IP] + 1];
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DBG_INFO(("JPAR %s = 0x%x\n", getRegName(reg), regs[reg]));
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DBG_INFO(("JPAR %s = 0x%x\n", getRegName(reg), regs[reg]));
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if (flags.CF == 0 && flags.ZF == 0) {
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if (flags.CF == 1) {
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regs[IP] = reg;
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regs[IP] = reg;
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return true;
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return true;
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}
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}
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@ -685,7 +685,7 @@ bool VM::execJPBI(void) {
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imm = *(uint16_t *)&as.code[regs[IP] + 1];
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imm = *(uint16_t *)&as.code[regs[IP] + 1];
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DBG_INFO(("JPBI 0x%x\n", imm));
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DBG_INFO(("JPBI 0x%x\n", imm));
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if (flags.CF == 1) {
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if (flags.CF == 0) {
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regs[IP] = imm;
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regs[IP] = imm;
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return true;
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return true;
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}
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}
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@ -699,7 +699,7 @@ bool VM::execJPBR(void) {
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reg = as.code[regs[IP] + 1];
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reg = as.code[regs[IP] + 1];
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DBG_INFO(("JPBR %s = 0x%x\n", getRegName(reg), regs[reg]));
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DBG_INFO(("JPBR %s = 0x%x\n", getRegName(reg), regs[reg]));
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if (flags.CF == 1) {
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if (flags.CF == 0) {
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regs[IP] = reg;
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regs[IP] = reg;
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return true;
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return true;
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}
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}
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