peperunas/gipu
1
0
Fork 0
Code Issues 3 Pull Requests Releases Wiki Activity

Compare commits

base: peperunas:0dfd9bdb57628746803475f57560ab3a079d8510
Branches Tags
peperunas:master
..
compare: peperunas:223b3c81f89aec383f8206b398d5bea86f758603
Branches Tags
peperunas:master

No commits in common. "0dfd9bdb57628746803475f57560ab3a079d8510" and "223b3c81f89aec383f8206b398d5bea86f758603" have entirely different histories.
0dfd9bdb57 ... 223b3c81f8

6 changed files with 13 additions and 171 deletions
Show Stats Expand all files Collapse all files

38
assembler/assembler.py
View File

@ -49,7 +49,6 @@ class InvalidValue(AssemblerException):
class VMAssembler: class VMAssembler:
def __init__(self, key, data): def __init__(self, key, data):
self.data = data self.data = data
self.assembled_code = bytearray() self.assembled_code = bytearray()
@ -80,15 +79,13 @@ class VMAssembler:
# putting main in first position in order to assemble it first # putting main in first position in order to assemble it first
for i, f in enumerate(self.functions): for i, f in enumerate(self.functions):
if f.name == "main" and i is not 0: if f.name == "main" and i is not 0:
self.functions[0], self.functions[ self.functions[0], self.functions[i] = self.functions[i], self.functions[0]
i] = self.functions[i], self.functions[0] break
break
# calculating functions offsets # calculating functions offsets
for i in range(1, len(self.functions)): for i in range(1, len(self.functions)):
prev_fun_tot_size = self.functions[ prev_fun_tot_size = self.functions[i-1].size + self.functions[i-1].offset
i - 1].size + self.functions[i - 1].offset
cur_fun_size = self.functions[i].size cur_fun_size = self.functions[i].size
self.functions[i].set_offset(prev_fun_tot_size) self.functions[i].set_offset(prev_fun_tot_size)
return return
@ -212,8 +209,7 @@ class VMAssembler:
# the symbal has not been resolved # the symbal has not been resolved
if dst.name == dst.value: if dst.name == dst.value:
# check whether it is a function # check whether it is a function
val = next( val = next((x.offset for x in self.functions if x.name == dst.name), None)
(x.offset for x in self.functions if x.name == dst.name), None)
# check whether it is a label # check whether it is a label
if val == None: if val == None:
for f in self.functions: for f in self.functions:
@ -258,9 +254,7 @@ class VMAssembler:
for o, n in zip(olds, ops): for o, n in zip(olds, ops):
print("{} : {}->{}".format(o.name, hex(o.value), hex(n.value))) print("{} : {}->{}".format(o.name, hex(o.value), hex(n.value)))
class VMFunction: class VMFunction:
def __init__(self, name, code): def __init__(self, name, code):
self.name = name self.name = name
self.size = 0 self.size = 0
@ -275,12 +269,11 @@ class VMFunction:
label = label_re.match(line) label = label_re.match(line)
if label: if label:
label_name = label.group(1) label_name = label.group(1)
self.instructions.append( self.instructions.append(VMInstruction(code[i+1], label_name))
VMInstruction(code[i + 1], label_name))
i += 2 i += 2
elif ins: elif ins:
self.instructions.append(VMInstruction(line)) self.instructions.append(VMInstruction(line))
i += 1 i+= 1
else: else:
raise InvalidOperation(line) raise InvalidOperation(line)
self.calc_size() self.calc_size()
@ -304,7 +297,6 @@ class VMFunction:
def __repr__(self): def __repr__(self):
return "{}: size {}, offset {}".format(self.name, hex(self.size), hex(self.offset)) return "{}: size {}, offset {}".format(self.name, hex(self.size), hex(self.offset))
class VMInstruction: class VMInstruction:
""" """
Represents an instruction the VM recognizes. Represents an instruction the VM recognizes.
@ -313,7 +305,7 @@ class VMInstruction:
opcode args opcode args
""" """
def __init__(self, line, label=None): def __init__(self, line, label = None):
self.opcode = None self.opcode = None
self.args = [] self.args = []
self.size = 1 self.size = 1
@ -322,11 +314,11 @@ class VMInstruction:
ins = instruction_re.match(line) ins = instruction_re.match(line)
symcall = symcall_re.match(line) symcall = symcall_re.match(line)
opcode = ins.group(1) opcode = ins.group(1)
self.opcode = next((x for x in ops if x.name == opcode), None) self.opcode = next((x for x in ops if x.name == opcode), None)
if self.opcode == None: if self.opcode == None:
raise InvalidOperation(opcode) raise InvalidOperation(opcode)
args = [x for x in ins.groups()[1:] if x is not None] args = [x for x in ins.groups()[1:] if x is not None]
for a in args: for a in args:
if immediate_re.match(a) or symcall: if immediate_re.match(a) or symcall:
@ -352,7 +344,7 @@ class VMComponent:
Represents a register, operation or an immediate the VM recognizes Represents a register, operation or an immediate the VM recognizes
""" """
def __init__(self, name, value, method=None): def __init__(self, name, value, method = None):
self.name = name.casefold() self.name = name.casefold()
self.value = value self.value = value
self.method = method self.method = method
@ -428,10 +420,6 @@ op_names = [["MOVI", "imm2reg"],
["MULR", "reg2reg"], ["MULR", "reg2reg"],
["DIVI", "imm2reg"], ["DIVI", "imm2reg"],
["DIVR", "reg2reg"], ["DIVR", "reg2reg"],
["SHLI", "imm2reg"],
["SHLR", "reg2reg"],
["SHRI", "imm2reg"],
["SHRR", "reg2reg"],
["PUSH", "regonly"], ["PUSH", "regonly"],
["POOP", "regonly"], ["POOP", "regonly"],
["CMPI", "imm2reg"], ["CMPI", "imm2reg"],
@ -454,8 +442,7 @@ op_names = [["MOVI", "imm2reg"],
reg_names = ["R0", "R1", "R2", "R3", "S0", "S1", "S2", "S3", "IP", "BP", "SP"] reg_names = ["R0", "R1", "R2", "R3", "S0", "S1", "S2", "S3", "IP", "BP", "SP"]
ops = [VMComponent(le[0], i, le[1]) for i, le in enumerate(op_names)] ops = [VMComponent(le[0], i, le[1]) for i, le in enumerate(op_names)]
regs = [VMComponent(s.casefold(), i) for i, s in enumerate(reg_names)] regs = [VMComponent(s.casefold(), i) for i, s in enumerate(reg_names)]
instruction_re = re.compile( instruction_re = re.compile("^([\w]{4})(?:\ +(?:([\w]+)\ *(?:,[\ ]*([\w]+))*))?$") # 1: opcode 2+: args
"^([\w]{4})(?:\ +(?:([\w]+)\ *(?:,[\ ]*([\w]+))*))?$") # 1: opcode 2+: args
function_re = re.compile("(?:def\ )([a-zA-Z]*)\:") function_re = re.compile("(?:def\ )([a-zA-Z]*)\:")
immediate_re = re.compile("(?:0x)?[0-9a-fA-F]+$") immediate_re = re.compile("(?:0x)?[0-9a-fA-F]+$")
alpha_re = re.compile("^[a-zA-Z]*$") alpha_re = re.compile("^[a-zA-Z]*$")
@ -463,7 +450,6 @@ register_re = re.compile("(^[rRsS][0-4]$)|([iIrRsS][pP]$)")
label_re = re.compile("^([a-zA-Z]+)\:$") label_re = re.compile("^([a-zA-Z]+)\:$")
symcall_re = re.compile("^([jJ][pPmM][pPaAbBeEnN][iIrR])\ +([\w]*)$") symcall_re = re.compile("^([jJ][pPmM][pPaAbBeEnN][iIrR])\ +([\w]*)$")
def main(): def main():
if len(sys.argv) < 4: if len(sys.argv) < 4:
print("Usage: {} opcodes_key file_to_assemble output".format( print("Usage: {} opcodes_key file_to_assemble output".format(

27
test/tea-decrypt.c
View File

@ -1,27 +0,0 @@
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <unistd.h>
void decrypt(uint32_t *v, uint32_t *k) {
uint32_t v0 = v[0], v1 = v[1], sum = 0xC6EF3720, i; /* set up */
uint32_t delta = 0x9e3779b9; /* a key schedule constant */
uint32_t k0 = k[0], k1 = k[1], k2 = k[2], k3 = k[3]; /* cache key */
for (i = 0; i < 32; i++) { /* basic cycle start */
v1 -= ((v0 << 4) + k2) ^ (v0 + sum) ^ ((v0 >> 5) + k3);
v0 -= ((v1 << 4) + k0) ^ (v1 + sum) ^ ((v1 >> 5) + k1);
sum -= delta;
} /* end cycle */
v[0] = v0;
v[1] = v1;
}
int main(int argc, char *argv[]) {
if (argc != 3) {
printf("Usage: %s text_to_decrypt key", argv[0]);
exit(1);
}
decrypt((uint32_t*)argv[1], (uint32_t*)argv[2]);
printf("Result: %s", argv[1]);
return 0;
}

38
test/tea-encrypt.c
View File

@ -1,38 +0,0 @@
#include <stdint.h>
#include <stdio.h>
#include <stdlib.h>
#include <string.h>
#include <unistd.h>
void encrypt(uint32_t *v, uint32_t *k) {
uint32_t v0 = v[0], v1 = v[1], sum = 0, i; /* set up */
uint32_t delta = 0x9e3779b9; /* a key schedule constant */
uint32_t k0 = k[0], k1 = k[1], k2 = k[2], k3 = k[3]; /* cache key */
for (i = 0; i < 32; i++) { /* basic cycle start */
sum += delta;
v0 += ((v1 << 4) + k0) ^ (v1 + sum) ^ ((v1 >> 5) + k1);
v1 += ((v0 << 4) + k2) ^ (v0 + sum) ^ ((v0 >> 5) + k3);
} /* end cycle */
v[0] = v0;
v[1] = v1;
}
int main(int argc, char *argv[]) {
uint8_t *buf;
uint32_t buflen, i;
if (argc != 3) {
printf("Usage: %s text_to_encrypt key", argv[0]);
exit(1);
}
buflen = strlen(argv[1]);
buf = (uint8_t *)malloc(buflen);
memcpy(buf, argv[1], buflen);
encrypt((uint32_t *)buf, (uint32_t *)argv[2]);
printf("Result:\n");
for (i = 0; i < buflen; i++) {
printf("%02x", buf[i]);
}
printf("\n");
return 0;
}

8
vm/opcodes.h
View File

@ -24,10 +24,6 @@ enum OPS_STARTING_VALUES {
MULR, MULR,
DIVI, DIVI,
DIVR, DIVR,
SHLI,
SHLR,
SHRI,
SHRR,
PUSH, PUSH,
POOP, POOP,
CMPI, CMPI,
@ -87,10 +83,6 @@ INSTRUCTION SIZES
#define MULR_SIZE REG2REG #define MULR_SIZE REG2REG
#define DIVI_SIZE IMM2REG #define DIVI_SIZE IMM2REG
#define DIVR_SIZE REG2REG #define DIVR_SIZE REG2REG
#define SHLI_SIZE IMM2REG
#define SHLR_SIZE REG2REG
#define SHRI_SIZE IMM2REG
#define SHRR_SIZE REG2REG
#define PUSH_SIZE REGONLY #define PUSH_SIZE REGONLY
#define POOP_SIZE REGONLY #define POOP_SIZE REGONLY
#define CMPI_SIZE IMM2REG #define CMPI_SIZE IMM2REG

69
vm/vm.cpp
View File

@ -459,62 +459,10 @@ bool VM::execDIVR(void) {
dst = as.code[regs[IP] + 1] >> 4; dst = as.code[regs[IP] + 1] >> 4;
src = as.code[regs[IP] + 1] & 0b00001111; src = as.code[regs[IP] + 1] & 0b00001111;
DBG_INFO(("DIVR %s, 0x%x\n", getRegName(dst), src)); DBG_INFO(("ADDR %s, 0x%x\n", getRegName(dst), src));
regs[dst] /= regs[src]; regs[dst] /= regs[src];
return true; return true;
} }
bool VM::execSHLI(void) {
/*
DIVI R0, 0x2 | R0 /= 2
*/
uint8_t dst;
uint16_t src;
dst = as.code[regs[IP] + 1];
src = *((uint16_t *)&as.code[regs[IP] + 2]);
DBG_INFO(("SHLI %s, 0x%x\n", getRegName(dst), src));
regs[dst] = regs[dst] << src;
return true;
}
bool VM::execSHLR(void) {
/*
SHLR R0, R1 -> R0 /= R1
*/
uint8_t dst;
uint8_t src;
dst = as.code[regs[IP] + 1] >> 4;
src = as.code[regs[IP] + 1] & 0b00001111;
DBG_INFO(("SHLR %s, 0x%x\n", getRegName(dst), src));
regs[dst] = regs[dst] << regs[src];
return true;
}
bool VM::execSHRI(void) {
/*
SHRI R0, 0x2 | R0 /= 2
*/
uint8_t dst;
uint16_t src;
dst = as.code[regs[IP] + 1];
src = *((uint16_t *)&as.code[regs[IP] + 2]);
DBG_INFO(("SHRI %s, 0x%x\n", getRegName(dst), src));
regs[dst] = regs[dst] >> src;
return true;
}
bool VM::execSHRR(void) {
/*
SHRR R0, R1 -> R0 /= R1
*/
uint8_t dst;
uint8_t src;
dst = as.code[regs[IP] + 1] >> 4;
src = as.code[regs[IP] + 1] & 0b00001111;
DBG_INFO(("SHRR %s, 0x%x\n", getRegName(dst), src));
regs[dst] = regs[dst] >> regs[src];
return true;
}
bool VM::execPUSH(void) { bool VM::execPUSH(void) {
// TODO: STACK < 0 // TODO: STACK < 0
uint8_t src; uint8_t src;
@ -807,21 +755,6 @@ void VM::run(void) {
} else if (opcode == OPS[DIVI]) { } else if (opcode == OPS[DIVI]) {
execDIVI(); execDIVI();
regs[IP] += DIVI_SIZE; regs[IP] += DIVI_SIZE;
} else if (opcode == OPS[DIVR]) {
execDIVR();
regs[IP] += DIVR_SIZE;
} else if (opcode == OPS[SHLI]) {
execSHLI();
regs[IP] += SHLI_SIZE;
} else if (opcode == OPS[SHLR]) {
execSHLR();
regs[IP] += SHLR_SIZE;
} else if (opcode == OPS[SHRI]) {
execSHRI();
regs[IP] += SHRI_SIZE;
} else if (opcode == OPS[SHRR]) {
execSHRR();
regs[IP] += SHRR_SIZE;
} else if (opcode == OPS[PUSH]) { } else if (opcode == OPS[PUSH]) {
execPUSH(); execPUSH();
regs[IP] += PUSH_SIZE; regs[IP] += PUSH_SIZE;

4
vm/vm.h
View File

@ -54,10 +54,6 @@ private:
bool execMULR(void); bool execMULR(void);
bool execDIVI(void); bool execDIVI(void);
bool execDIVR(void); bool execDIVR(void);
bool execSHLI(void);
bool execSHLR(void);
bool execSHRI(void);
bool execSHRR(void);
bool execPUSH(void); bool execPUSH(void);
bool execPOOP(void); bool execPOOP(void);
bool execCMPI(void); bool execCMPI(void);