Assembler con label
This commit is contained in:
Giulio De Pasquale
parent
71266d07c0
commit
c24e2c791f
@ -47,6 +47,7 @@ class InvalidValue(AssemblerException):
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def __init__(self, instruction):
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super().__init__("Invalid value while assembling: {}".format(instruction))
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class VMAssembler:
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def __init__(self, key):
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@ -58,7 +59,6 @@ class VMAssembler:
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action(instruction)
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def process_code_line(self, line):
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sys.stdout.write("CODE: ")
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components = [x for x in re.split('\W', line) if x]
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instruction = VMInstruction(components[0], components[1:])
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sys.stdout.write(str(instruction) + "\n")
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@ -166,6 +166,21 @@ class VMAssembler:
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self.assembled_code += opcode.uint8() + imm.uint16()
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return
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def jump(self, instruction):
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imm_op_re = re.compile(".*[iI]$")
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reg_op_re = re.compile(".*[rR]$")
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arg = instruction.args[0]
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section = next((x for x in sections if x.name == arg.name), None)
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# TODO this is due the VMComponent structure
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instruction.args[0].name = section.offset
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instruction.args[0].value = section.offset
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if imm_op_re.match(instruction.opcode.name):
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self.immonly(instruction)
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elif reg_op_re.match(instruction.opcode.name):
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self.regonly(instruction)
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else:
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raise AssemblerException()
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def single(self, instruction):
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"""
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Instruction with no arguments
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@ -242,7 +257,7 @@ class VMComponent:
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return True
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def isimm(self):
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if self.name != self.value:
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if not immediate_re.match(str(self.name)):
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return False
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return True
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@ -256,23 +271,59 @@ class VMInstruction:
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"""
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def __init__(self, opcode, instr_list):
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immediate_regexp = re.compile("^(0x*|[0-9]*$)")
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self.opcode = None
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self.args = None
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self.size = 1
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self.opcode = next((x for x in ops if x.name == opcode), None)
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if self.opcode == None:
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raise InvalidOperation(opcode)
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self.args = []
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for el in instr_list:
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if not immediate_regexp.match(el):
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if immediate_re.match(el):
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# directly append the immediate
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self.args.append(VMComponent(el, el))
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self.size += 2
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continue
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elif register_re.match(el):
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# create a VM component for a register
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reg_comp = next((x for x in regs if x.name == el), None)
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self.args.append(reg_comp)
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self.size += 1
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continue
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else:
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# directly append the immediate
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self.args.append(VMComponent(el, el))
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# section
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sec_comp = next((x for x in sections if x.name == el), None)
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if sec_comp:
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self.args.append(VMComponent(
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sec_comp.name, sec_comp.offset))
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self.size += 2
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continue
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raise AssemblerException()
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def __repr__(self):
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return "{} {}".format(self.opcode.name, ", ".join([x.name for x in self.args]))
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class VMSection:
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"""
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Represents a code section or "label" such as "main:"
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"""
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def __init__(self, name):
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self.name = name
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self.size = 0
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self.offset = 0
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def set_size(self, size):
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self.size = size
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def set_offset(self, offset):
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self.offset = offset
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def __repr__(self):
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return "{} | s: {}, o: {}".format(self.name, hex(self.size), hex(self.offset))
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op_names = [["MOVI", "imm2reg"],
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["MOVR", "reg2reg"],
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["LOAD", "imm2reg"],
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@ -299,30 +350,54 @@ op_names = [["MOVI", "imm2reg"],
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["POOP", "regonly"],
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["CMPI", "imm2reg"],
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["CMPR", "reg2reg"],
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["JMPI", "immonly"],
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["JMPR", "regonly"],
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["JPAI", "immonly"],
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["JPAR", "regonly"],
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["JPBI", "immonly"],
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["JPBR", "regonly"],
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["JPEI", "immonly"],
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["JPER", "regonly"],
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["JPNI", "immonly"],
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["JPNR", "regonly"],
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["JMPI", "jump"],
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["JMPR", "jump"],
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["JPAI", "jump"],
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["JPAR", "jump"],
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["JPBI", "jump"],
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["JPBR", "jump"],
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["JPEI", "jump"],
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["JPER", "jump"],
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["JPNI", "jump"],
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["JPNR", "jump"],
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["SHIT", "single"],
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["NOPE", "single"],
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["GRMN", "single"]]
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reg_names = ["R0", "R1", "R2", "R3", "S0", "S1", "S2", "S3", "IP", "BP", "SP"]
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section_names = ["DATA:", "CODE:", "STACK:"]
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section_flags = {s.casefold(): i + 1 for i, s in enumerate(section_names)}
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ops = [VMComponent(le[0], i, le[1]) for i, le in enumerate(op_names)]
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regs = [VMComponent(s.casefold(), i) for i, s in enumerate(reg_names)]
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sections = []
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section_re = re.compile("[a-zA-Z]*\:$")
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immediate_re = re.compile("^[0-9].*")
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register_re = re.compile("(^[rRsS]{1}[0-9]{1}$)|([iIbBsS]{1}[pP]{1}$)")
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def assemble_data(line):
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sys.stdout.write("DATA:\t")
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sys.stdout.write(line.strip(",") + "\n")
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def parse_sections(lines):
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current_size = 0
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current_section = None
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for line in lines:
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if section_re.match(line):
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if current_section:
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tmp = next(x for x in sections if x.name == current_section)
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tmp.set_size(current_size)
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current_section = line.casefold()[:-1]
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sections.append(VMSection(current_section))
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current_size = 0
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continue
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components = [x for x in re.split('\W', line) if x]
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instruction = VMInstruction(components[0], components[1:])
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current_size += instruction.size
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tmp = next(x for x in sections if x.name == current_section)
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tmp.set_size(current_size)
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def calc_section_offsets():
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current_offset = 0
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for i in range(1, len(sections)):
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prev_size = sections[i - 1].size
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current_offset += prev_size
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sections[i].set_offset(current_offset)
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def main():
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@ -330,22 +405,25 @@ def main():
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print("Usage: {} opcodes_key file_to_assemble output".format(
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sys.argv[0]))
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return
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vma = VMAssembler(sys.argv[1])
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with open(sys.argv[2], 'r') as f:
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gen = (line.casefold().strip() for line in f if line != "\n")
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flag = None
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filedata = f.readlines()
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filedata = [x.strip() for x in filedata if x.strip()]
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for line in gen:
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if line in section_flags:
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flag = section_flags[line]
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continue
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if flag == section_flags["data:"]:
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# let's parse the whole file for labels
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parse_sections(filedata)
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if "main" not in [x.name for x in sections]:
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sys.stderr.write("No main specified!")
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return
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calc_section_offsets()
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for line in filedata:
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if not section_re.match(line):
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vma.process_code_line(line)
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elif flag == section_flags["code:"]:
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vma.process_code_line(line)
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if not flag:
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sys.stderr.write(
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"Nothing was assembled! Did you use the section delimiters?\n")
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with open(sys.argv[3], 'wb') as f:
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f.write(vma.assembled_code)
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