Assembler OO
This commit is contained in:
Giulio De Pasquale
parent
8ad7634be1
commit
9d888723b7
@ -1,6 +1,160 @@
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import sys
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import sys
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import re
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import re
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import struct
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import struct
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import IPython
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class VMAssembler:
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assembled_code = bytearray()
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def parse(self, instruction):
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action = getattr(self, "{}".format(instruction.opcode.name))
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action(instruction)
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def process_code_line(self, line):
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sys.stdout.write("CODE: ")
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components = [x for x in re.split('\W', line) if x]
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instruction = VMInstruction(components[0], components[1:])
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self.parse(instruction)
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def imm2reg(self, instruction):
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"""
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Intel syntax -> REG, IMM
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"""
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opcode = instruction.opcode
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reg = instruction.args[0]
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imm = instruction.args[1]
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print(instruction)
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if reg.name != "ip":
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if opcode.uint8() and reg.uint8() and imm.uint16():
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self.assembled_code += opcode.uint8() + reg.uint8() + imm.uint16()
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else:
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sys.stderr.write(
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"ERROR WHILE ASSEMBLING UNKNOWN VALUES\n")
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return False
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else:
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sys.stderr.write("CAN'T MOVI TO IP!\n")
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return False
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return True
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def reg2reg(self, instruction):
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return
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def reg2imm(self, instruction):
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"""
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Intel syntax -> IMM, REG
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"""
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opcode = instruction.opcode
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imm = instruction.args[0]
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reg = instruction.args[1]
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print(instruction)
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if reg.name != "ip":
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if opcode.uint8() and reg.uint8() and imm.uint16():
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self.assembled_code += opcode.uint8() + imm.uint16() + reg.uint8()
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else:
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sys.stderr.write(
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"ERROR WHILE ASSEMBLING UNKNOWN VALUES\n")
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return False
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else:
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sys.stderr.write("CAN'T MOVI TO IP!\n")
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return False
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return True
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def imm(self, instruction):
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return
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def movi(self, instruction):
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if not self.imm2reg(instruction):
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print("WAT")
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return False
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return True
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def movr(self, instruction):
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if not self.reg2reg(instruction):
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print("WAT")
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return False
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return True
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def getm(self, instruction):
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if not self.imm2reg(instruction):
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print("WAT")
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return False
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return True
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def putm(self, instruction):
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if not self.reg2imm(instruction):
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print("WAT")
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return False
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return True
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def addi(self, instruction):
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if not self.imm2reg(instruction):
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print("WAT")
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return False
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return True
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class VMComponent:
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"""
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Represents a register or a operation the VM recognizes
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"""
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name = ""
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value = ""
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def __init__(self, name, value):
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self.name = name
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self.value = value
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def __repr__(self):
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return "{}".format(self.name)
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def uint8(self):
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numre = re.compile("^[0-9]+$")
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if isinstance(self.value, int):
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return struct.pack("<B", self.value)
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elif self.value.startswith("0x"):
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return struct.pack("<B", int(self.value, 16))
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elif numre.match(self.value): # only numbers
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return struct.pack("<B", int(self.value))
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return None
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def uint16(self):
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numre = re.compile("^[0-9]+$")
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if isinstance(self.value, int):
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return struct.pack("<H", self.value)
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elif self.value.startswith("0x"):
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return struct.pack("<H", int(self.value, 16))
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elif numre.match(self.value): # only numbers
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return struct.pack("<H", int(self.value))
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return None
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class VMInstruction:
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"""
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Represents an instruction the VM recognizes.
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e.g: MOVI [R0, 2]
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^ ^
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opcode args
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"""
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def __init__(self, opcode, instr_list):
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# TODO EXCEPTION SE REGISTRO / IMM / OPCODE NON VALIDO
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immediate_regexp = re.compile("^(0x*|[0-9]*$)")
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opc_name, opc_value = value_from_list(ops, opcode)
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self.opcode = VMComponent(opc_name, opc_value)
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self.args = []
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for el in instr_list:
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if not immediate_regexp.match(el):
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# create a VM component for a register
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reg_name, reg_value = value_from_list(regs, el)
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self.args.append(VMComponent(reg_name, reg_value))
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else:
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# directly append the immediate
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self.args.append(VMComponent(el, el))
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def __repr__(self):
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return "{} {}".format(self.opcode.name, ", ".join([x.name for x in self.args]))
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op_names = ["MOVI",
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op_names = ["MOVI",
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"MOVR",
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"MOVR",
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@ -23,215 +177,57 @@ op_names = ["MOVI",
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"CALL",
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"CALL",
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"HALT",
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"HALT",
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"NOPE"]
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"NOPE"]
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reg_names = ["R0", "R1", "R2", "R3", "S0", "S1", "S2", "S3", "IP", "BP", "SP"]
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reg_names = ["R0", "R1", "R2", "R3", "S0", "S1", "S2", "S3", "IP", "BP", "SP"]
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section_names = ["DATA:", "CODE:", "STACK:"]
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section_names = ["DATA:", "CODE:", "STACK:"]
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section_flags = {s.casefold(): i + 1 for i, s in enumerate(section_names)}
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section_flags = {s.casefold(): i + 1 for i, s in enumerate(section_names)}
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ops = {s.casefold(): i for i, s in enumerate(op_names)}
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ops = [VMComponent(s.casefold(), i) for i, s in enumerate(op_names)]
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regs = {s.casefold(): i for i, s in enumerate(reg_names)}
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regs = [VMComponent(s.casefold(), i) for i, s in enumerate(reg_names)]
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assembled = bytearray()
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def value_from_list(fromlist, name):
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"""
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returns a tuple (name, value) from a list of VMComponents
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def to_uint8(data):
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"""
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alphanum = re.compile("^[0-9]+$")
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for el in fromlist:
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if isinstance(data, int):
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if el.name == name:
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return struct.pack("<B", data)
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return (el.name, el.value)
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elif data.startswith("0x"):
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return struct.pack("<B", int(data, 16))
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elif alphanum.match(data): # only numbers
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return struct.pack("<B", int(data))
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return None
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return None
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def to_uint16(data):
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def name_from_list(fromlist, value):
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alphanum = re.compile("^[0-9]+$")
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"""
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if isinstance(data, int):
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returns a tuple (name, value) from a list of VMComponents
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return struct.pack("<H", data)
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"""
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elif data.startswith("0x"):
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for el in fromlist:
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return struct.pack("<H", int(data, 16))
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if el.value == value:
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elif alphanum.match(data): # only numbers
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return (el.name, el.value)
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return struct.pack("<H", int(data))
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return None
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return None
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def is_reg(data):
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if data not in [rn.casefold() for rn in reg_names]:
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return False
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return True
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def movi(op_str, dst_str, src_str):
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global assembled
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if is_reg(dst_str):
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if dst_str != "ip":
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op_val = to_uint8(ops[op_str])
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dst_val = to_uint8(regs[dst_str])
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src_val = to_uint16(src_str)
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if op_val and dst_val and src_val:
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assembled += op_val + dst_val + src_val
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else:
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sys.stderr.write(
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"ERROR WHILE ASSEMBLING UNKNOWN VALUES\n")
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return False
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else:
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sys.stderr.write("CAN'T MOVI TO IP!\n")
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return False
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else:
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sys.stderr.write(
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"ERROR WHILE ASSEMBLING UNKNOWN REGISTER: {}\n".format(dst_str))
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return False
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return True
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def movr(op_str, dst_str, src_str):
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global assembled
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if is_reg(dst_str) and is_reg(src_str):
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if dst_str != "ip" and src_str != "ip":
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op_val = to_uint8(ops[op_str])
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dstsrc_val = (to_uint8(regs[dst_str])[0]
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<< 4) ^ to_uint8(regs[src_str])[0]
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if op_val and dstsrc_val:
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assembled += op_val + to_uint8(dstsrc_val)
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else:
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sys.stderr.write(
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"ERROR WHILE ASSEMBLING UNKNOWN VALUES\n")
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return False
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else:
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sys.stderr.write("CAN'T MOVR IP!\n")
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return False
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else:
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if not is_reg(dst_str):
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sys.stderr.write(
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"ERROR WHILE ASSEMBLING UNKNOWN REGISTER: {}\n".format(dst_str))
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else:
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sys.stderr.write(
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"ERROR WHILE ASSEMBLING UNKNOWN REGISTER: {}\n".format(src_str))
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return False
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return True
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def getm(op_str, dst_str, src_str):
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global assembled
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if is_reg(dst_str):
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if dst_str != "ip":
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op_val = to_uint8(ops[op_str])
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dst_val = to_uint8(regs[dst_str])
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src_val = to_uint16(src_str)
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if op_val and dst_val and src_val:
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assembled += op_val + dst_val + src_val
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else:
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sys.stderr.write(
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"ERROR WHILE ASSEMBLING UNKNOWN VALUES\n")
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return False
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else:
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sys.stderr.write("CAN'T MOVI TO IP!\n")
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return False
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else:
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sys.stderr.write(
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"ERROR WHILE ASSEMBLING UNKNOWN REGISTER: {}\n".format(dst_str))
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return False
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return True
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def putm(op_str, dst_str, src_str):
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global assembled
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if is_reg(src_str):
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if src_str != "ip":
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op_val = to_uint8(ops[op_str])
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src_val = to_uint8(regs[src_str])
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dst_val = to_uint16(dst_str)
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if op_val and dst_val and src_val:
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assembled += op_val + dst_val + src_val
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else:
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sys.stderr.write(
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"ERROR WHILE ASSEMBLING UNKNOWN VALUES\n")
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return False
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else:
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sys.stderr.write("CAN'T MOVI TO IP!\n")
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return False
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else:
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sys.stderr.write(
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"ERROR WHILE ASSEMBLING UNKNOWN REGISTER: {}\n".format(dst_str))
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return False
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return True
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def addi(op_str, dst_str, src_str):
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global assembled
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if is_reg(dst_str):
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if src_str != "ip":
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op_val = to_uint8(ops[op_str])
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src_val = to_uint16(src_str)
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dst_val = to_uint8(regs[dst_str])
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if op_val and dst_val and src_val:
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assembled += op_val + dst_val + src_val
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else:
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sys.stderr.write(
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"ERROR WHILE ASSEMBLING UNKNOWN VALUES\n")
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return False
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else:
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sys.stderr.write("CAN'T MOVI TO IP!\n")
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return False
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else:
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sys.stderr.write(
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"ERROR WHILE ASSEMBLING UNKNOWN REGISTER: {}\n".format(dst_str))
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return False
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return True
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def assemble_code(line):
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global assembled
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sys.stdout.write("CODE: ")
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instruction = [x for x in re.split('\W', line) if x]
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op_name = instruction[0].casefold()
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if op_name not in [on.casefold() for on in op_names]:
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sys.stderr.write(
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"ERROR WHILE ASSEMBLING UNKNOWN OPERATION: {}\n".format(op_name))
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return False
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sys.stdout.write("{} {}\n".format(op_name, ", ".join(instruction[1::])))
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if op_name == "movi":
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movi(op_name, instruction[1], instruction[2])
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elif op_name == "movr":
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movr(op_name, instruction[1], instruction[2])
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elif op_name == "getm":
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getm(op_name, instruction[1], instruction[2])
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elif op_name == "putm":
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putm(op_name, instruction[1], instruction[2])
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elif op_name == "addi":
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addi(op_name, instruction[1], instruction[2])
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return True
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def assemble_data(line):
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def assemble_data(line):
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sys.stdout.write("DATA:\t")
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sys.stdout.write("DATA:\t")
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sys.stdout.write(line.strip(",") + "\n")
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sys.stdout.write(line.strip(",") + "\n")
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def main():
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def main():
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global assembled
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if len(sys.argv) < 3:
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if len(sys.argv) < 3:
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print("Usage: {} file_to_assemble output".format(sys.argv[0]))
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print("Usage: {} file_to_assemble output".format(sys.argv[0]))
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return
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return
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vma = VMAssembler()
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with open(sys.argv[1], 'r') as f:
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with open(sys.argv[1], 'r') as f:
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gen = (line.casefold().strip("\n") for line in f if line != "\n")
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gen = (line.casefold().strip("\n") for line in f if line != "\n")
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flag = None
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flag = None
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for line in gen:
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for line in gen:
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if line.startswith(tuple([sn.casefold() for sn in section_names])):
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if line in section_flags:
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flag = section_flags[line]
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flag = section_flags[line]
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continue
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continue
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if flag == section_flags["data:"]:
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if flag == section_flags["data:"]:
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assemble_data(line)
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vma.process_code_line(line)
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elif flag == section_flags["code:"]:
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elif flag == section_flags["code:"]:
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assemble_code(line)
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vma.process_code_line(line)
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if not flag:
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if not flag:
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sys.stderr.write(
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sys.stderr.write(
|
||||||
"Nothing was assembled! Did you use the section delimiters?\n")
|
"Nothing was assembled! Did you use the section delimiters?\n")
|
||||||
with open(sys.argv[2], 'wb') as f:
|
with open(sys.argv[2], 'wb') as f:
|
||||||
f.write(assembled)
|
f.write(vma.assembled_code)
|
||||||
|
|
||||||
if __name__ == '__main__':
|
if __name__ == '__main__':
|
||||||
main()
|
main()
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user