gipu/vm/opcodes.h

/*
MEMORY LOCATIONS AND IMMEDIATES ARE 16 BITS LONG
*/
enum OPS_STARTING_VALUES {
  MOVI,
  MOVR,
  LOAD,
  STOR,
  ADDI,
  ADDR,
  SUBI,
  SUBR,
  ANDB,
  ANDW,
  ANDR,
  YORB,
  YORW,
  YORR,
  XORB,
  XORW,
  XORR,
  NOTR,
  MULI,
  MULR,
  DIVI,
  DIVR,
  SHLI,
  SHLR,
  SHRI,
  SHRR,
  PUSH,
  POOP,
  CMPI,
  CMPR,
  JMPI,
  JMPR,
  JPAI,
  JPAR,
  JPBI,
  JPBR,
  JPEI,
  JPER,
  JPNI,
  JPNR,
  RETN,
  SHIT,
  NOPE,
  GRMN,
  NUM_OPS
};

uint8_t OPS[NUM_OPS];

/*
INSTRUCTION SIZE TYPES
*/
#define REG2REG 2
#define IMM2REG 4
#define REG2IMM 4
#define BYT2REG 3
#define REGONLY 2
#define IMMONLY 3
#define SINGLE 1

/*
INSTRUCTION SIZES
*/
#define MOVI_SIZE IMM2REG
#define MOVR_SIZE REG2REG
#define LOAD_SIZE IMM2REG
#define STOR_SIZE REG2IMM
#define ADDI_SIZE IMM2REG
#define ADDR_SIZE REG2REG
#define SUBI_SIZE IMM2REG
#define SUBR_SIZE REG2REG
#define ANDB_SIZE BYT2REG
#define ANDW_SIZE IMM2REG
#define ANDR_SIZE REG2REG
#define YORB_SIZE BYT2REG
#define YORW_SIZE IMM2REG
#define YORR_SIZE REG2REG
#define XORB_SIZE BYT2REG
#define XORW_SIZE IMM2REG
#define XORR_SIZE REG2REG
#define NOTR_SIZE REGONLY
#define MULI_SIZE IMM2REG
#define MULR_SIZE REG2REG
#define DIVI_SIZE IMM2REG
#define DIVR_SIZE REG2REG
#define SHLI_SIZE IMM2REG
#define SHLR_SIZE REG2REG
#define SHRI_SIZE IMM2REG
#define SHRR_SIZE REG2REG
#define PUSH_SIZE REGONLY
#define POOP_SIZE REGONLY
#define CMPI_SIZE IMM2REG
#define CMPR_SIZE REG2REG
#define JMPI_SIZE IMMONLY
#define JMPR_SIZE REGONLY
#define JPAI_SIZE IMMONLY
#define JPAR_SIZE REGONLY
#define JPBI_SIZE IMMONLY
#define JPBR_SIZE REGONLY
#define JPEI_SIZE IMMONLY
#define JPER_SIZE REGONLY
#define JPNI_SIZE IMMONLY
#define JPNR_SIZE REGONLY
#define RETN_SIZE SINGLE
#define SHIT_SIZE SINGLE
#define NOPE_SIZE SINGLE
#define GRMN_SIZE SINGLE